发明名称 |
Method for analyzing sensitivity and failure probability of a circuit |
摘要 |
A method, implemented in a processor, of determining a likelihood of failure of a circuit to be made in accordance with a circuit design, and a computer-readable storage medium storing instructions to the processor for carrying out the method. A sensitivity of a figure of merit to each variable of a plurality of variables is determined by simulating operation of the circuit using the processor. Determining the sensitivity is based on a departure of each of the variables from a respective mean value, where the variables include at least one variable derived from measurements of a fabricated component or component combination to be included in the circuit. Results from the simulation are used to predict a failure probability of the circuit to be made in accordance with the circuit design. |
申请公布号 |
US8656339(B2) |
申请公布日期 |
2014.02.18 |
申请号 |
US20100975585 |
申请日期 |
2010.12.22 |
申请人 |
GILLESPIE KEVIN M.;CORREIA TIMOTHY J.;PRIORE DONALD A.;ADVANCED MICRO DEVICES, INC. |
发明人 |
GILLESPIE KEVIN M.;CORREIA TIMOTHY J.;PRIORE DONALD A. |
分类号 |
G06F17/50;G06F9/455;G06F11/22;G06G7/62 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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