发明名称 Read methods, circuits and systems for memory devices
摘要 A memory device can include a plurality of programmable elements; at least one sense circuit that generates sense data values from detected impedances of accessed programmable elements; and at least one data store circuit that stores initial data values from the at least one sense circuit, and stores output data values from the at least one sense circuit after check conditions have been applied to at least one programmable element. The check conditions can induce a change in impedance for programmable elements programmed to at least one predetermined state. Methods can include reading data from at least one memory cell of a memory device comprising a plurality of such memory cells; if the read data has a first value, providing such data as an output value; and if the read data has a second value, repeating access to the memory cell to confirm the read data value.
申请公布号 US8654561(B1) 申请公布日期 2014.02.18
申请号 US201113276763 申请日期 2011.10.19
申请人 JAMESON JOHN ROSS;DINH JOHN;LEWIS DERRIC;WANG DANIEL;HOLLMER SHANE CHARLES;GILBERT NAD EDWARD;WANG JANET;ADESTO TECHNOLOGIES CORPORATION 发明人 JAMESON JOHN ROSS;DINH JOHN;LEWIS DERRIC;WANG DANIEL;HOLLMER SHANE CHARLES;GILBERT NAD EDWARD;WANG JANET
分类号 G11C11/00 主分类号 G11C11/00
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