| 摘要 |
<p>The present invention addresses the problem of providing a method for producing a SGT, which is a metal gate, and a structure of the SGT obtained by the method. The method reduces a parasitic capacitance between a gate wiring and a substrate, uses a thin gate material, and is self-alignment process. The above-described problem is addressed by the following configuration. A fin-like silicon layer is formed on a silicon substrate, a first insulating film is formed around the fin-like silicon layer, and a columnar silicon layer is formed above the fin-like silicon layer. The columnar silicon layer has a diameter that is the same as the width of the fin-like silicon layer. Then, a gate insulating film is formed around the columnar silicon layer, and a metal film and a polysilicon film are formed around the gate insulating film. The polysilicon film has a thickness smaller than the diameter of the columnar silicon layer. A third resist is formed for forming a gate wiring, the gate wiring is formed by anisotropic etching, and a fourth resist is deposited. The polysilicon film on the side wall above the columnar silicon layer is exposed, the polysilicon film thus exposed is removed by etching, the fourth resist is removed, the metal film is removed by etching, and a gate electrode that is connected to the gate wiring is formed.</p> |
