发明名称
摘要 A sigma-delta (SigmaDelta) difference-of-squares LOG-RMS to digital converter" by merging a traditional SigmaDelta modulator with an analog LOG-RMS to DC converter based on a difference-of-squares concept. Two basic architectures include one based on two squaring cells in the feedforward and feedback paths and a second based on a single squaring cell in the forward path. High-order SigmaDelta LOG-RMS can be implemented with a loop filter containing multiple integrators and feedforward and/or feedback paths for frequency compensation. The embodiments as described allow the implementations of SigmaDelta difference-of-squares LOG-RMS to DC converters with a natural digital output and a logarithmically compressed dynamic range.
申请公布号 JP2014504087(A) 申请公布日期 2014.02.13
申请号 JP20130543349 申请日期 2011.12.08
申请人 发明人
分类号 H03M3/02 主分类号 H03M3/02
代理机构 代理人
主权项
地址
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