MICROPROCESSOR THAT TRANSLATES CONDITIONAL LOAD/STORE INSTRUCTIONS INTO VARIABLE NUMBER OF MICROINSTRUCTIONS
摘要
<p>A microprocessor instruction translator translates a conditional load instruction into at least two microinstructions. An out-of-order execution pipeline executes the microinstructions. To execute a first microinstruction, an execution unit receives source operands from the source registers of a register file and responsively generates a first result using the source operands. To execute a second the microinstruction, an execution unit receives a previous value of the destination register and the first result and responsively reads data from a memory location specified by the first result and provides a second result that is the data if a condition is satisfied and that is the previous destination register value if not. The previous value of the destination register comprises a result produced by execution of a microinstruction that is the most recent in-order previous writer of the destination register with respect to the second microinstruction.</p>
申请公布号
EP2695078(A1)
申请公布日期
2014.02.12
申请号
EP20120768614
申请日期
2012.04.06
申请人
VIA TECHNOLOGIES, INC.;HENRY, G. GLENN;COL, GERARD M.;EDDY, COLIN;HOOKER, RODNEY E.;PARKS, TERRY
发明人
HENRY, G. GLENN;COL, GERARD M.;EDDY, COLIN;HOOKER, RODNEY E.;PARKS, TERRY