发明名称 Last branch record indicators for transactional memory
摘要 <p>In one embodiment, a processor includes an execution unit and at least one last branch record (LBR) register to store address information of a branch taken during program execution. This register may further store a transaction indicator to indicate whether the branch was taken during a transactional memory (TM) transaction. This register may further store an abort indicator to indicate whether the branch was caused by a transaction abort. Other embodiments are described and claimed.</p>
申请公布号 GB2504858(A) 申请公布日期 2014.02.12
申请号 GB20130014780 申请日期 2011.07.28
申请人 INTEL CORPORATION 发明人 RAVI RAJWAR;LAURA A KNAUTH;PETER LACHNER;KONRAD K LAI
分类号 G06F11/34;G06F9/38;G06F9/46;G06F11/36 主分类号 G06F11/34
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