MEMORY SYSTEM HAVING A SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME

摘要

Provided are a memory system and a controlling method of the same which comprises: an external chip set which generates a power-down command signal, an auto-refresh command signal, or a power-down-auto-refresh command signal; and a semiconductor memory device which performs a power-down operation and an auto-refresh operation in response to the power-down-auto-refresh command signal. The semiconductor memory device includes: a control circuit for controlling the operation of the semiconductor device; a memory cell array in which actual data is stored; and a peripheral circuit. [Reference numerals] (201) Chip set; (221) Power-down circuit unit; (222) Refresh circuit unit; (223) Other control circuit unit; (224) Power-down termination detecting unit; (225) Delay control unit; (226) Auto-refresh command signal generating unit; (230) Memory cell array; (240) Peripheral circuit