| 摘要 |
<p>1,264,352. Electronic component assemblies. WESTINGHOUSE ELECTRIC CORP. 1 May, 1969 [3 May, 1968], No. 22231/69. Heading H1R. An electronic component packaging assembly includes a substrate 10 having thereon a pattern of electrical conductors 20 having a plurality of terminals extending to the periphery of the substrate, and a frame 14 provided with a cover hermetically enclosing a plurality of components 25 (e.g. integrated circuit chips, thin film elements, resistors, capacitors &c.) positioned over and spaced from the conductors by a dielectric bonding material 28 (e.g. a cured organic resin such as diphenyl oxide varnish combined with a filler matching the coefficient of expansion of component 25). A plurality of conductive patterns may be provided each spaced by a dielectric material (e.g. aromatic polyamide or a polyamide resin), the top pattern being spaced from the components via the bonding material 28, Fig. 3 (not shown). The components are selectively connected to the conductors by wires bonded (e.g. by thermocompression or ultrasonic bonding) therebetween. The substrate may be ceramic (e.g. alumina), and the pattern 20 (e.g. gold-plated molybdenum-manganese) may be silk screened on the substrate. In the case of multi-layer patterns, the spacing insulating layer may be formed by spinning and etching portions for the interconnectors, and subsequent conductive layers may be formed by electroless plating copper, followed by electroplating of nickel and gold, the final pattern being formed by photoresist and etching techniques. The further conductive layers may alternatively be formed by spinning a gold resinate on the insulating surfaces and subsequently photo-etching to form the pattern.</p> |
