发明名称 |
Apparatus and methods for controlled error injection |
摘要 |
In accordance with an embodiment of the invention, precision control of error injection may be accomplished by way of synchronous error signals accompanying data transfers along various pipeline stages of a data path. The synchronous error signals may be used to trigger error events in a given protocol logic block (i.e. in a given sub-component of the data path). The protocol logic block is configurable to determine whether any action is to be taken upon the assertion of the error signal. Multiple error events may be triggered as the data signal (and its accompanying synchronous error signal) passes through pipelined functions of the data path so as to create complex error conditions. In addition, deterministic handling of created errors may be accomplished using a loopback path with bypassable blocks on both forward and reverse transformations. Other embodiments, aspects and features are also disclosed. |
申请公布号 |
US8650447(B1) |
申请公布日期 |
2014.02.11 |
申请号 |
US201113183147 |
申请日期 |
2011.07.14 |
申请人 |
WORTMAN CURT;DUWEL KEITH;NGO HUY;ALTERA CORPORATION |
发明人 |
WORTMAN CURT;DUWEL KEITH;NGO HUY |
分类号 |
G01R31/28;G01R27/28;G01R31/00;G01R31/14;G11C7/00;G11C29/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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