发明名称 Method for detecting variance in semiconductor processes
摘要 A method of detecting variance by regression model has the following steps. Step 1 is preparing the FDC data and WAT data for analysis. Step 2 is figuring out what latent variable effect of WAT data by Factor Analysis Step 3 is utilizing Principal Component Analysis to reduce the number of FDC variables to a few independent principal components. Step 4 is demonstrating how the tools and FDC data affect WAT data by Analysis of covariance model, and constructing interrelationship among FDC, WAT and tools. The interrelationship can point out which parameter effect WAT significantly. By the method, when WAT abnormal situation happened, it is easier for engineers to trace where the problem is.
申请公布号 US8649990(B2) 申请公布日期 2014.02.11
申请号 US201113170229 申请日期 2011.06.28
申请人 CHU YIJ CHIEH;CHEN CHUN CHI;TIAN YUN-ZONG;INOTERA MEMORIES, INC. 发明人 CHU YIJ CHIEH;CHEN CHUN CHI;TIAN YUN-ZONG
分类号 G06F19/00 主分类号 G06F19/00
代理机构 代理人
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