The present invention relates to an integrated circuit for a test operation in which unit circuit for each of a plurality of internal circuits are sampled. The integrated circuit comprises a voltage detecting unit for detecting a voltage level value corresponding to the unit circuit; and an AD converting circuit for outputting test data by converting an output signal of the voltage detecting circuit into a digital code. [Reference numerals] (110) First internal circuit; (120) Second internal circuit; (130) Third internal circuit; (140) Voltage detection circuit; (150) AD converting circuit; (AA) Semiconductor memory device
