发明名称 POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE
摘要 A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well.
申请公布号 US2014034999(A1) 申请公布日期 2014.02.06
申请号 US201313887704 申请日期 2013.05.06
申请人 AZURE SILICON LLC 发明人 KOREC JACEK
分类号 H01L29/739;H01L29/66 主分类号 H01L29/739
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