发明名称 ELECTRIC CHARACTERISTIC EXTRACTION METHOD AND DEVICE
摘要 PROBLEM TO BE SOLVED: To accurately create a model of a semiconductor package on which a plurality of semiconductor chips are mounted.SOLUTION: An electric characteristic extraction method executed by a computer performs the following: reads simulation data stored in a storage unit, which is related to a semiconductor package in which a plurality of chips are arranged in a single layer on a silicon interposer to which a virtual grand surface is inserted; extracts a first inductance value of the virtual grand surface and stores it in the storage unit; extracts a second inductance value of a signal line connecting between the plurality of chips and the virtual grand surface, and stores it in the storage unit; and subtracts the first inductance value from the second inductance value so as to correct the second inductance value, thereby obtaining an inductance value of the signal line between the plurality of chips.
申请公布号 JP2014026463(A) 申请公布日期 2014.02.06
申请号 JP20120166269 申请日期 2012.07.26
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 KIMURA YOSHIJI
分类号 G06F17/50 主分类号 G06F17/50
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