发明名称 METHOD AND APPARATUS FOR LIMITING ACCESS TO AN INTEGRATED CIRCUIT (IC)
摘要 A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.
申请公布号 US2014035560(A1) 申请公布日期 2014.02.06
申请号 US201213566363 申请日期 2012.08.03
申请人 OLMOS ALFREDO;FEDDELER JAMES R.;NAGDA MITEN H.;PIETRI STEFANO;FREESCALE SEMICONDUCTOR, INC. 发明人 OLMOS ALFREDO;FEDDELER JAMES R.;NAGDA MITEN H.;PIETRI STEFANO
分类号 G01R23/14 主分类号 G01R23/14
代理机构 代理人
主权项
地址