| 摘要 |
PURPOSE: A latch-up free ESD protection circuit is provided to improve the reliability of a product by sufficiently absorbing surge current including DC current. CONSTITUTION: A low voltage clamp and a high voltage clamp are connected to a signal line. The signal line is connected to the internal circuit of a protection object. A low voltage clamp includes an NMOS transistor (M1), a Zener diode (ZD1), a first resistance (R1), and a second resistance (R2). A high voltage clamp includes an NMOS transistor (M2) and a third resistance (R3). A first switching device is a MOS transistor or a bipolar transistor. [Reference numerals] (AA) Fin (pad); (BB) Current limit low voltage clamp; (CC) High voltage clamp; (DD) Inner circuit |
