发明名称 LEVEL SHIFT CIRCUIT, SEMICONDUCTOR DEVICE
摘要 A level shift circuit is provided that includes: latch circuits (Q5, Q6, Q7, Q8) including first inverter circuits (Q5, Q7) and second inverter circuits (Q6, Q8); a first input MOS transistor (Q1) that operates in response to an input signal; a second input MOS transistor (Q2) that operates in response to an inversion signal of the input signal; and a current voltage control MOS transistor (Q9). The latch circuits (Q5, Q6, Q7, Q8) output voltages that have levels obtained by converting the levels of the input voltages. The first and second input MOS transistors (Q1, Q2) receive input signals at gate terminals thereof, and drive the latch circuits (Q5, Q6, Q7, Q8) according to the input signals. The current voltage control MOS transistor (Q9) is provided between the input MOS transistors (Q1, Q2) and the latch circuits (Q5, Q6, Q7, Q8), and receives a supplied control voltage at a gate terminal thereof, so as to be driven according to inversion actions of the latch circuits.
申请公布号 WO2014020724(A1) 申请公布日期 2014.02.06
申请号 WO2012JP69593 申请日期 2012.08.01
申请人 RENESAS ELECTRONICS CORPORATION;KAWASAKI, YOICHI 发明人 KAWASAKI, YOICHI
分类号 H03K19/0185 主分类号 H03K19/0185
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