发明名称 MULTI-CORE COMPUTE CACHE COHERENCY WITH A RELEASE CONSISTENCY MEMORY ORDERING MODEL
摘要 A method includes storing, with a first programmable processor, shared variable data to cache lines of a first cache of the first processor. The method further includes executing, with the first programmable processor, a store-with-release operation, executing, with a second programmable processor, a load-with-acquire operation, and loading, with the second programmable processor, the value of the shared variable data from a cache of the second programmable processor.
申请公布号 US2014040552(A1) 申请公布日期 2014.02.06
申请号 US201313958399 申请日期 2013.08.02
申请人 QUALCOMM INCORPORATED 发明人 RYCHLIK BOHUSLAV;TZENG TZUNG REN;GRUBER ANDREW EVAN;BOURD ALEXEI V.;SHARP COLIN CHRISTOPHER;DEMERS ERIC
分类号 G06F12/08 主分类号 G06F12/08
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