发明名称 SELF-ALIGNED NAND FLASH SELECT-GATE WORDLINES FOR SPACER DOUBLE PATTERNING
摘要 <p>A method for double patterning is disclosed. In one embodiment the formation a pair of select gate wordlines on either side of a plurality of core wordlines begins by placing a spacer pattern around edges of a photoresist pattern is disclosed. The photoresist pattern is stripped away leaving the spacer pattern. A trim mask is placed over a portion of the spacer pattern. Portions of the spacer pattern are etched away that are not covered by the trim mask. The trim mask is removed, wherein first remaining portions of the spacer pattern define a plurality of core wordlines. A pad mask is placed such that the pad mask and second remaining portions of the spacer pattern define a select gate wordline on either side of the plurality of core wordlines. Finally at least one pattern transfer layer is etched through using the mad mask and the first and second remaining portions of the spacer pattern to etch the select gate wordlines and the plurality of core wordlines into a poly silicon layer.</p>
申请公布号 KR20140015294(A) 申请公布日期 2014.02.06
申请号 KR20137018650 申请日期 2011.12.16
申请人 SPANSION LLC 发明人 CHEN TUNG SHENG;FANG SHENQING
分类号 H01L21/027 主分类号 H01L21/027
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