发明名称 Automatic Misalignment Balancing Scheme for Multi-Patterning Technology
摘要 Some aspects of the present disclosure provide for a method of automatically balancing mask misalignment for multiple patterning layers to minimize the consequences of mask misalignment. In some embodiments, the method defines a routing grid for one or more double patterning layers within an IC layout. The routing grid has a plurality of vertical grid lines extending along a first direction and a plurality of horizontal grid lines extending along a second, orthogonal direction. Alternating lines of the routing grid in a given direction (e.g., the horizontal and vertical direction) are assigned different colors. Shapes on the double patterning layers are then routed along the routing grid in a manner that alternates between different colored grid lines. By routing in such a manner, variations in capacitive coupling caused by mask misalignment are reduced.
申请公布号 US2014038085(A1) 申请公布日期 2014.02.06
申请号 US201213562436 申请日期 2012.07.31
申请人 CHERN CHAN-HONG;CHUNG TAO WEN;HUANG MING-CHIEH;LIN CHIH-CHANG;HUANG TSUNG-CHING (JIM);HSUEH FU-LUNG;TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHERN CHAN-HONG;CHUNG TAO WEN;HUANG MING-CHIEH;LIN CHIH-CHANG;HUANG TSUNG-CHING (JIM);HSUEH FU-LUNG
分类号 G06F17/50;G03F1/68 主分类号 G06F17/50
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