发明名称 DIRECTORY ERROR CORRECTION IN MULTI-CORE PROCESSOR ARCHITECTURES
摘要 Technologies are generally described that relate to processing cache coherence information and processing a request for a data block. In some examples, methods for processing cache coherence information are described that may include storing in a directory a tag identifier effective to identify a data block. The methods may further include storing a state identifier in association with the tag identifier. The state identifier may be effective to identify a coherence state of the data block. The methods may further include storing sharer information in association with the tag identifier. The sharer information may be effective to indicate one or more caches storing the data block. The methods may include storing, by the controller in the directory, replication information in association with the sharer information. The replication information may be effective to indicate a type of replication of the sharer information in the directory, and effective to indicate replicated segments.
申请公布号 WO2014021853(A1) 申请公布日期 2014.02.06
申请号 WO2012US48997 申请日期 2012.07.31
申请人 EMPIRE TECHNOLOGY DEVELOPMENT LLC;SOLIHIN, YAN 发明人 SOLIHIN, YAN
分类号 G06F13/00 主分类号 G06F13/00
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