发明名称 |
Wafer level package structure and the fabrication method thereof |
摘要 |
The present invention proposes a package for semiconductor device and the fabrication method for integrally encapsulating a whole semiconductor chip within a molding compound. In the semicondcutor device package, bonding pads distributed on the top of the chip are redistributed into an array of redistributed bonding pads located in an dielectric layer by utilizing the redistribution technique. The electrodes or signal terminals on the top of the semiconductor chip are connected to an electrode metal segment on the bottom of the chip by conductive materials filled in through holes formed in a silicon substrate of a semiconductor wafer. Furthermore, the top molding portion and the bottom molding portion seal the semiconductor chip completely, thus providing optimum mechanical and electrical protections. |
申请公布号 |
US8642385(B2) |
申请公布日期 |
2014.02.04 |
申请号 |
US201113205864 |
申请日期 |
2011.08.09 |
申请人 |
XUE YAN XUN;HUANG PING;HO YUEH-SE;YILMAZ HAMZA;LU JUN;LU MING-CHEN;ALPHA & OMEGA SEMICONDUCTOR, INC. |
发明人 |
XUE YAN XUN;HUANG PING;HO YUEH-SE;YILMAZ HAMZA;LU JUN;LU MING-CHEN |
分类号 |
H01L23/498;H01L21/78 |
主分类号 |
H01L23/498 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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