发明名称 Semiconductor package with through silicon vias and method for making the same
摘要 The present invention relates to a stacked semiconductor package and a method for making the same. The method includes the steps of mounting a plurality of first dice to a wafer by conducting a reflow process; and thinning the wafer from the backside surface of the wafer, thereby reducing manufacturing time and preventing warpage.
申请公布号 US8643167(B2) 申请公布日期 2014.02.04
申请号 US201113311364 申请日期 2011.12.05
申请人 HUNG CHIA-LIN;CHEN JEN-CHUAN;CHANG HUI-SHAN;YANG KUO-PIN;ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 HUNG CHIA-LIN;CHEN JEN-CHUAN;CHANG HUI-SHAN;YANG KUO-PIN
分类号 H01L23/04;H01L23/34 主分类号 H01L23/04
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