LAMINATED CHIP ELECTRONIC COMPONENT, BOARD FOR MOUNTING THE SAME, PACKING UNIT THEREOF

摘要

A laminated chip capacitor according to one embodiment of the present invention comprises: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction. When half of a thickness of the ceramic body is defined as A, a thickness of the lower cover layer is defined as B, half of a thickness of the active layer is defined as C, and a thickness of the upper cover layer is defined as D, the thickness (D) of the upper cover layer satisfies a range of D>=4μm and a ratio (B+C)/A by which a central portion of the active layer deviates from a central portion of the ceramic body satisfies a range of 1.063 <= (B+C)/A <= 1.745. Either of the upper and lower cover layers may include an identification portion distinguishing upper and lower portions of the ceramic body by a difference in terms of brightness or a color thereof.