发明名称 METHOD AND DEVICE FOR EXTRACTING PARASITIC RESISTANCE IN FIELD EFFECT TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To improve the accuracy of extracting parasitic resistance in a field effect transistor.SOLUTION: A parasitic resistance extraction device comprises: an S parameter measurement unit 100 which, while changing a gate-source voltage Vunder drain-source voltage V=0 conditions, measures the S parameter of a HEMT or MOSFET which is the field effect transistor of concern; an impedance matrix conversion unit 101 for converting the S parameter into an impedance matrix [Z] to find the real part of impedance, Re{Z}; and an arithmetic unit 102 which, when gate resistance, source resistance, and fitting parameters are defined as R, R, and G, V respectively, determines the gate resistance R, the source resistance R, and the fitting parameters G, V by a least square method so that Re{Z} obtained from a prescribed relational expression and Re{Z} found by the impedance matrix conversion unit 101 will match.
申请公布号 JP2014022423(A) 申请公布日期 2014.02.03
申请号 JP20120157151 申请日期 2012.07.13
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KOSUGI TOSHIHIKO;MURATA KOICHI;HAMADA YASUSHI
分类号 H01L29/80;H01L21/336;H01L21/338;H01L29/00;H01L29/778;H01L29/78;H01L29/812 主分类号 H01L29/80
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