发明名称 MEMORY ACCESS DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory access device capable of performing efficient access even when the order of commands to be transferred to a memory device is changed while preventing a command issued from a bus master from being continuously overtaken by the following commands issued from another bus master or the same bus master.SOLUTION: Plural commands each issued from plural bus masters 110-112 are held by the corresponding command queues 130-132. A master arbitration part 150 selects a specific bus master from the plural bus masters 110-112. Command selection sections 140-142 provided corresponding to the command queues 130-132, selects one command from a command group within a performance assured period while changing the order of commands within the performance assured period which is a period of time the processing is ensured.
申请公布号 JP2014021952(A) 申请公布日期 2014.02.03
申请号 JP20120163467 申请日期 2012.07.24
申请人 PANASONIC CORP 发明人 YAMAMOTO TAKASHI;OGOSHI WATARU;ICHIGUCHI SEIDO
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址