发明名称 CHARGE PUMP REDUNDANCY IN A MEMORY
摘要 An integrated circuit includes a circuit block to utilize a load current at a load voltage from a power input and two or more charge pump arrays. The outputs of the charge pump arrays are coupled to the power input of the circuit block. The integrated circuit includes one or more modifiable elements to disable one or more of the two or more charge pump arrays.
申请公布号 US2014029346(A1) 申请公布日期 2014.01.30
申请号 US201213995166 申请日期 2012.03.25
申请人 TANZAWA TORU;TANAKA TOMOHARU 发明人 TANZAWA TORU;TANAKA TOMOHARU
分类号 G11C16/30 主分类号 G11C16/30
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