发明名称 POSITIVE/NEGATIVE VOLTAGE GENERATION CIRCUIT IN SILICON-ON-INSULATOR PROCESS
摘要 Disclosed is a positive/negative voltage generation circuit in a silicon-on-insulator (SOI) process, comprising: an NMOS transistor and a PMOS transistor which constitute a phase inverter, a parasitic diode between the source electrode and the substrate of a metal oxide semiconductor field-effect transistor (MOS transistor) in an SOI process, a first transfer capacitor, a second transfer capacitor, a first output capacitor, a second output capacitor, a first diode arranged between the first transfer capacitor and the first output capacitor, and a second diode arranged between the second transfer capacitor and the second output capacitor. By means of two transistor switches, four capacitors and several diodes, a positive output voltage and a negative output voltage can be generated simultaneously, and the circuit only uses a single-phase clock. Compared with the existing positive voltage generation circuit and negative voltage generation circuit, the circuit of the present invention is simple in structure and has no need for a two-phase non-overlapping clock, effectively saving the chip area.
申请公布号 WO2014015768(A1) 申请公布日期 2014.01.30
申请号 WO2013CN79747 申请日期 2013.07.19
申请人 SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD. 发明人 LI, YANG;GUO, YAOHUI;SUN, JIAN
分类号 H02M3/155 主分类号 H02M3/155
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