JOINT SEQUENCE ESTIMATION OF SYMBOL AND PHASE WITH HIGH TOLERANCE OF NONLINEARITY

摘要

A sequence estimation circuit may be operable to receive a sample of a received inter-symbol correlated (ISC) signal corresponding to a transmitted vector of symbols, wherein each of the symbols is one of a plurality of symbols in a particular constellation. The sequence estimation circuit may be operable to generate an estimate of the transmitted vector of symbols using a reduced state sequence estimation (RSSE) process. Each iteration of the RSSE process may comprise generating a plurality of candidate vectors. A first element of each of the candidate vectors may hold a respective one of the plurality symbols in the particular constellation. The first element may be an estimate of a symbol of the transmitted vector of symbols other than a most-recent symbol of the transmitted vector of symbols. A second element of each of said candidate vectors holds a respective one of a plurality of calculated filler values.