发明名称 ENCODING, DECODING, AND MULTI-STAGE DECODING CIRCUITS AND METHODS FOR CONCATENATED BCH CODE, ERROR CORRECT CIRCUIT OF FLASH MEMORY DEVICE USING THE SAME, AND FLASH MEMORY DEVICE USING THE SAME
摘要 The present invention relates to a connected BCH coding, a decoding, a multi-layer coding circuit, a method, an error correction circuit of a flash memory device, and the flash memory device. The present invention relates to the connected BCH coding circuit comprising: a first stage decoding unit for outputting first output data protected by a first output BCH coding by executing the BCH coding by receiving storage data provided from the flash memory device; a first interleaving unit for converting the direction of the first output data or the first output BCH coding by dividing the first output BCH coding or the first output data into two or more blocks; a second stage decoding unit for outputting second output data protected by a second output BCH coding by executing the BCH coding by receiving the output of the first interleaving unit; a second interleaving unit for converting the direction of second output data or the second output BCH coding by dividing the second output BCH coding or the second output data into two or more blocks; a third stage decoding unit for outputting third output data protected by a third output BCH coding by executing the BCH coding by receiving the output of the second interleaving unit; and a third interleaving unit for converting the direction of third output data or the third output BCH coding by dividing the third output BCH coding or the third output data into two or more blocks.
申请公布号 KR101355986(B1) 申请公布日期 2014.01.29
申请号 KR20120073371 申请日期 2012.07.05
申请人 发明人
分类号 G11C29/42;H03M13/15;H03M13/27 主分类号 G11C29/42
代理机构 代理人
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