发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH SIDE CONTACT |
摘要 |
The present invention relates to a method for manufacturing a semiconductor device which can reduce parasitic capacitance between buried bit lines. The method for manufacturing a semiconductor device according to the present invention comprises the following steps of: forming trenches on a semiconductor substrate; forming an insulating layer on side walls and bottoms of the trenches; forming a conductive pattern which buries a part of each trench on the insulating layer; exposing the side walls of each trench by recessing the insulating layer exposed by the conductive pattern; forming a migration assistance layer covering at least the top of the conductive pattern and a surface of the recessed insulating layer; and forming a burying layer which buries the rest part of each trench by a migration process. According to the present invention, when a bit line is formed, the bit line is not buried in a trench between pillars but directly comes into contact with the bottom of the pillar, thereby improving the density of a semiconductor device and reducing parasitic capacitance between adjacent bit lines and a migration process is smoothly performed by forming a migration assistant layer on side walls of trenches, thereby preventing silicon agglomeration. |
申请公布号 |
KR20140011572(A) |
申请公布日期 |
2014.01.29 |
申请号 |
KR20120077779 |
申请日期 |
2012.07.17 |
申请人 |
SK HYNIX INC. |
发明人 |
KIM, TAE YOON;CHO, HEUNG JAE |
分类号 |
H01L21/8242;H01L21/336;H01L27/108 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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