发明名称
摘要 A plasma processor chamber includes a bottom electrode (13) and a top electrode assembly (14) having a center electrode (16,36) surrounded by a grounded electrode (34,42). RF excited plasma between the electrodes induces a DC bias on them. A measure of the bottom electrode DC bias controls the capacitance of a first series resonant circuit connected between the center electrode and ground. A measure of the center electrode DC bias controls the capacitance of a second series resonant circuit connected between the bottom electrode and ground.
申请公布号 JP5400294(B2) 申请公布日期 2014.01.29
申请号 JP20070515238 申请日期 2005.05.25
申请人 发明人
分类号 H01L21/3065;H01J37/32;H05H1/46 主分类号 H01L21/3065
代理机构 代理人
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