发明名称
摘要 <p>One-time programmable cell and memory device having the same includes a first metal oxide semiconductor (MOS) transistor configured to form a current path between a first node and a second node in response to a read-control signal, a second MOS transistor configured to form a current path between a third node and the second node in response to a write-control signal and an anti-fuse connected between the second node and a ground voltage terminal, wherein a voltage applied to the second node is output as an output signal.</p>
申请公布号 JP5403576(B2) 申请公布日期 2014.01.29
申请号 JP20080034544 申请日期 2008.02.15
申请人 发明人
分类号 G11C17/14 主分类号 G11C17/14
代理机构 代理人
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