发明名称 |
Circuit verification using computational algebraic geometry |
摘要 |
In one exemplary embodiment of the invention, a method includes: receiving a first description for a circuit whose operation over a plurality of inputs is to be verified; receiving a second description for expected behavior of the circuit, where the expected behavior in the second description is expressed as a set of algebraic systems of multivariable polynomials over at least one Galois field; applying at least one computational algebraic geometry technique to a combination of the first description and the second description to determine whether the circuit is verified, where verification of the circuit confirms that at least one output obtained based on the first description corresponds to at least one expected value based on the expected behavior expressed in the second description; and outputting an indication as to whether the circuit is verified. |
申请公布号 |
US8640065(B2) |
申请公布日期 |
2014.01.28 |
申请号 |
US201213360083 |
申请日期 |
2012.01.27 |
申请人 |
JANSSEN GRADUS (GEERT);LASTRAS-MONTANO LUIS;LVOV ALEXEY Y.;PARUTHI VIRESH;SHADOWEN ROBERT;TRAGER BARRY M.;WINOGRAD SHMUEL;EL-ZEIN ALI;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
JANSSEN GRADUS (GEERT);LASTRAS-MONTANO LUIS;LVOV ALEXEY Y.;PARUTHI VIRESH;SHADOWEN ROBERT;TRAGER BARRY M.;WINOGRAD SHMUEL;EL-ZEIN ALI |
分类号 |
G06F9/455;G06F17/50 |
主分类号 |
G06F9/455 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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