发明名称 |
SELF-ALIGNED PROCESS TO FABRICATE A MEMORY CELL ARRAY WITH A SURROUNDING-GATE ACCESS TRANSISTOR |
摘要 |
A method to prevent a gate contact from electrically connecting to a source contact for a plurality of memory cells on a substrate. The method includes forming pillars with a doped silicon region on the substrate. An electrically conductive gate material is deposited between and over the pillars. The gate material is etched such that the gate material partially fills a space between the pillars. The pillars are then etched such that a pair of pillars from the pillars include an insulating material over the doped silicon region. A gate contact is deposited between the pair of pillars such that the gate contact electrically couples the gate material at a contact interface level, and the insulating material extends below the contact interface level. |
申请公布号 |
US2014024185(A1) |
申请公布日期 |
2014.01.23 |
申请号 |
US201213551776 |
申请日期 |
2012.07.18 |
申请人 |
BRIGHTSKY MATTHEW J.;LAM CHUNG H.;LAUER GEN P.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BRIGHTSKY MATTHEW J.;LAM CHUNG H.;LAUER GEN P. |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|