发明名称
摘要 A packet switching system for a packet transfer network, the system having an architecture including a plurality of line cards, each including an ingress path pipeline, with processing elements, and an egress buffer, and an electro-optical In/Out (IO) interconnect coupling the line cards to one another in a full mesh connectivity, in the absence of a switch fabric, wherein the ingress path pipeline of each line card is coupled by means of the electro-optical IO interconnect to the egress buffer of each of the plurality of line cards.
申请公布号 JP2014502077(A) 申请公布日期 2014.01.23
申请号 JP20130536770 申请日期 2011.10.26
申请人 发明人
分类号 H04L12/931 主分类号 H04L12/931
代理机构 代理人
主权项
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