| 摘要 |
A semiconductor memory device includes an error correction code (ECG) result generation block configured to receive a decision voltage, to perform an ECC operation, and to output ECC information, and a decision voltage control block configured to control a voltage level adjustment width of the decision voltage in response to the ECC information. As described above, the semiconductor memory device according to an embodiment of the present invention may perform diverse ECC operations by controlling the voltage level adjustment width of the decision voltage VR that is used during the ECC operation, and through the diverse ECC operations, the time for performing an ECC operation may be reduced and the operation efficiency of the ECC operation may be increased. |
