发明名称 |
DUAL RAIL POWER SUPPLY SCHEME FOR MEMORIES |
摘要 |
A dual rail memory operable at a first voltage and a second voltage includes an input circuit, an output circuit and a clock generator circuit coupled with the input circuit. The input circuit is operable to receive at least a first input signal referenced to the first voltage and to generate a second input signal referenced to the second voltage. The output circuit is operable to receive at least a first output signal referenced to the second voltage and to generate a second output signal referenced to the first voltage. The clock generator circuit is operable to receive a first clock signal referenced to the first voltage and to generate a second clock signal referenced to the second voltage, a logic state of the second clock signal being a function of a logic state of the first clock signal. |
申请公布号 |
US2014025981(A1) |
申请公布日期 |
2014.01.23 |
申请号 |
US201213552020 |
申请日期 |
2012.07.18 |
申请人 |
EVANS DONALD A.;CHARY RASOJU V.;GOEL ANKUR;RAO SETTI S.;LSI CORPORATION |
发明人 |
EVANS DONALD A.;CHARY RASOJU V.;GOEL ANKUR;RAO SETTI S. |
分类号 |
G06F1/08 |
主分类号 |
G06F1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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