| 摘要 |
The present invention relates to a variable divider and a variable dividing method. According to the present invention, provided are the variable divider and the variable dividing method, capable of operating at high speed by generating an internal clock signal by dividing an input clock signal with an internal division ratio, generating an output clock signal according to the internal clock signal, and obtaining an arbitrary division ratio. [Reference numerals] (100) Internal clock signal generation unit;(200) Output clock signal generation unit;(300) Delay signal generation unit;(CLK_IN) Input clock signal;(CLK_OUT) Output clock signal;(CLK_S) Internal clock signal;(FB) Feedback signal;(Q) Demultiplication rate;(R) Control value;(STALL) Delay signal |
