发明名称 DEVICE, INTEGRATED CIRCUIT, METHOD AND COMPUTER-READABLE MEDIUM FOR CONTROLLING A MULTI-GAIN STATE POWER AMPLIFIER
摘要 Techniques for optimizing the power consumption of existing low cost multi-gain state power amplifiers (PA) to increase the talk time of wireless communication devices are described. In an exemplary embodiment a device, such as a baseband processor, operates to set a multistage PA having at least two gain states for amplifying a transmit signal to a lowest power consuming gain state. The device calculates a transition power level as a function of an identified maximum power reduction (MPR) value and switches the PA to a higher gain state from a lower gain state when a transmission power level is higher than the calculated transition power level.
申请公布号 KR101354619(B1) 申请公布日期 2014.01.22
申请号 KR20117027729 申请日期 2010.04.21
申请人 发明人
分类号 H03G3/30;H04W52/52 主分类号 H03G3/30
代理机构 代理人
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