发明名称 HIGH EFFICIENCY LOAD INSENSITIVE POWER AMPLIFIER CIRCUIT AND METHOD OPERATING ON HIGH EFFICIENCY LOAD INSENSITIVE POWER AMPLIFIER CIRCUIT
摘要 An advanced balanced RF power amplifier circuit is provided. The RF power amplifier has a pair of RF amplification paths constructed to efficiently operate in a high-power mode. When instructed to operate in a low-power mode, one of the amplification paths is deactivated, and optionally, an impedance device is also set to operate at a low-power impedance value. With only one path operating in low-power mode, the network RF topology has changed from the topology of the high-power mode. This new topology provides increased impedance on the active RF amplification path as compared to when both RF amplification paths were active. This increased impedance causes the RF power amplifier to operate more efficiently in its low-power mode. Depending on the specific application and target performance, the impedance may be sufficiently increased simply by deactivating one of the RF amplification paths, and in other cases it may be desirable to switch an active or passive impedance device to operate at a low-power impedance. The impedance device enables further adjustment and tuning of the impedance in the low-power topology.
申请公布号 KR101354222(B1) 申请公布日期 2014.01.22
申请号 KR20087024593 申请日期 2007.03.09
申请人 发明人
分类号 H03F1/14;H03F3/68 主分类号 H03F1/14
代理机构 代理人
主权项
地址