| 摘要 |
PROBLEM TO BE SOLVED: To more reduce power consumption of a regulator circuit.SOLUTION: When a load Q21 is in an operation mode small in power consumption, not a main regulator 2 but a low consumption mode regulator 3 is operated, and when a load driving voltage VDDR drops, the low consumption mode regulator charges power to a stabilization capacity C21 connected to the load Q21 in parallel to thereby control such that the load driving voltage VDDR becomes a fixed voltage. In this case, the load driving voltage VDDR is monitored by first and second hysteresis inverters INV31 and INV32, and a monitor signal DET serving as an output of the second hysteresis inverter INV32 is input to a gate of a source metal-oxide semiconductor (MOS) transistor P31 connected between a power source VDD and a ground GND. Thus, power consumption of the low consumption mode regulator 3 can be reduced to substantially zero, that is, power consumption of a regulator circuit 1 can be reduced. |
