发明名称 DATA RECEPTION APPARATUS, AND DATA COMMUNICATION SYSTEM
摘要 <p>A data reception apparatus (3) determines an integrated number of bits by integrating the number of bits of a bit sequence, determines an integrated number of samples by integrating the number of samples obtained by oversampling each bit, determines an approximating line indicating the correspondence between the integrated number of bits and the integrated number of samples, and determines the bit length of the bit sequence corresponding to a segment in which the same value continues after the integrated number of samples on the basis of the approximating line. Even if a reception side oscillating source (4) has a degree of clock frequency error from a transmission side oscillation source (6), the number of samples per bit of the bit sequence is accurately determined with higher accuracy than the oversampling period (inverse of the number of samples).</p>
申请公布号 WO2014010236(A1) 申请公布日期 2014.01.16
申请号 WO2013JP04254 申请日期 2013.07.10
申请人 DENSO CORPORATION 发明人 AKITA, HIRONOBU;MATSUDAIRA, NOBUAKI;YAMAMOTO, HIROFUMI
分类号 H04L7/02;H04L25/40 主分类号 H04L7/02
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