发明名称 Power and Pin Efficient Chip-to-Chip Communications with Common-Mode Rejection and SSO Resilience
摘要 In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein a codeword is representable as a vector of a plurality of components and the bus uses at least as many signal lines as components of the vector that are used, mapping the codeword to a second set of physical signals, wherein components of the second set of physical signals can have values from a set of component values having at least three distinct values for at least one component, and providing the second set of physical signals for transmission over the data bus in a physical form.
申请公布号 US2014016724(A1) 申请公布日期 2014.01.16
申请号 US201314028240 申请日期 2013.09.16
申请人 ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL) 发明人 CRONIE HARM;SHOKROLLAHI AMIN
分类号 H04L1/00 主分类号 H04L1/00
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