发明名称 METHODS FOR SEMICONDUCTOR PROCESSOR DESIGN AND VERIFICATION
摘要 The invention provides in some aspects methods for semiconductor processor design and verification that include the steps of applying to each of a first simulator and a second simulator commonly-defined tests, comparing results of such execution as between the simulators, and generating an output indicative thereof. The first simulator simulates operation of the processor in accord with an architectural definition thereof, and the second simulator simulates operation of the processor in accord with a hardware definition thereof. The tests are defined in accord with one of those definitions, e.g., the hardware definition.
申请公布号 WO2014011766(A2) 申请公布日期 2014.01.16
申请号 WO2013US49914 申请日期 2013.07.10
申请人 PANEVE, LLC 发明人 FRANK, STEVEN, J.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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