ENCODING, DECODING, AND MULTI-STAGE DECODING CIRCUITS AND METHODS FOR CONCATENATED BCH CODE, ERROR CORRECT CIRCUIT OF FLASH MEMORY DEVICE USING THE SAME, AND FLASH MEMORY DEVICE USING THE SAME

摘要

The present invention relates to a connected BCH coding and decoding, a multi-layer decoding circuit, a method, an error correction circuit of a flash memory device, and the flash memory device, capable of controlling delay time according to error degrees using multi-layer decoding, decoding, and coding for the flash memory. The present invention relates to the connected BCH multi-layer decoding circuit comprising: a first stage decoding unit for outputting first output data protected by executing the BCH decoding by receiving a part of the connected BCH code; a deinterleaving unit for outputting the first output data or the first output BCH code by dividing the first output BCH code or the first output data into two or more blocks; a second stage decoding unit for outputting second output data protected by a second output BCH code by decoding the output of the deinterleaving unit; an interleaving unit for outputting the second output BCH code or the second output data by dividing the second BCH code or the second output data into two or more blocks; and a decoder power control unit for temporally blocking the power supply until a new BCH code is received for a decoding success block and by obtaining the decoding success block by monitoring the operation condition of the first and the second stage decoding unit.