发明名称 |
POLYCRYSTALLINE SILICON E-FUSE AND RESISTOR FABRICATION IN A METAL REPLACEMENT GATE PROCESS |
摘要 |
<p>A method of fabricating an integrated circuit is disclosed. The method comprises providing a substrate (100) having an isolation region (102) and etching a trench in the isolation region. A first conductive layer (114) is formed within the trench. A first transistor having a first conductivity type (n-channel) is formed at a face of the substrate. The first transistor has a gate formed of the first conductive layer. A second transistor having a second conductivity type (p-channel) is formed at the face of the substrate. The second transistor has a gate formed of the first conductive layer. The method further comprises replacing the first conductive layer of the first transistor with a first metal gate (132) and replacing the first conductive layer of the second transistor with a second metal gate (134).</p> |
申请公布号 |
WO2014011641(A1) |
申请公布日期 |
2014.01.16 |
申请号 |
WO2013US49736 |
申请日期 |
2013.07.09 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS JAPAN LIMITED |
发明人 |
MCKEE, BENJAMIN, P.;JIANG, YONGQIANG;GRIDER, DOUGLAS, T. |
分类号 |
H01L21/82;H01L21/336;H01L29/78 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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