发明名称 |
WORD LINE DRIVER CIRCUITS AND METHODS FOR SRAM BIT CELL WITH REDUCED BIT LINE PRE-CHARGE VOLTAGE |
摘要 |
A memory device comprising a plurality of static random access memory (SRAM) bit cells, and a word line driver coupled to provide a word line signal to the bit cells. The word line driver receives a global word line signal that remains active while the word line signal is asserted and subsequently de-asserted, and the word line signal is coupled between a positive supply voltage (VDD) and a supply voltage below ground (VN). |
申请公布号 |
US2014016400(A1) |
申请公布日期 |
2014.01.16 |
申请号 |
US201213548846 |
申请日期 |
2012.07.13 |
申请人 |
PELLEY PERRY H.;BURNETT JAMES D. |
发明人 |
PELLEY PERRY H.;BURNETT JAMES D. |
分类号 |
G11C11/413 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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