发明名称
摘要 <P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an epitaxial wafer having a good forward voltage by reducing defective forward voltage (Vf) generated by Si which is mixed when forming a p-type layer as compared with prior art. <P>SOLUTION: The method of manufacturing an epitaxial wafer includes at least a step for growing a p-type layer epitaxially on a substrate consisting of a compound semiconductor by hydride vapor phase epitaxial method. When temperature of the substrate is raised before starting epitaxial growth of the p-type layer, p-type dopant gas is fed more than that fed during epitaxial growth of the p-type layer. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP5387509(B2) 申请公布日期 2014.01.15
申请号 JP20100127152 申请日期 2010.06.02
申请人 发明人
分类号 H01L21/205;C23C16/30;C30B25/16;C30B29/44;H01L33/30 主分类号 H01L21/205
代理机构 代理人
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