发明名称 Debug circuitry
摘要 <p>A debug circuitry includes a first interface configured to receive at least one operational transaction. The debug circuitry further includes a second interface configured to provide an output. Transaction manipulation circuitry operates to manipulate the at least one operational transaction to provide a manipulated operational transaction output passed to the second interface as the output.</p>
申请公布号 GB201321056(D0) 申请公布日期 2014.01.15
申请号 GB20130021056 申请日期 2013.11.29
申请人 STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED 发明人
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