发明名称 Locally 2 sided CHC DRAM access transistor structure
摘要 A method for forming a DRAM memory with a two-sided transistor includes: providing a silicon finFET structure having at least two fins, and a trench between the fins; forming high ohmic gates on either side of the fins; forming a hole between each pair of high ohmic gates to enable connection between the pair of high ohmic gates; forming a gate on one side of the trench and underneath one of the pair of high ohmic gate; forming a layer of oxide over the gate; and depositing tungsten in the trench to form a thick layer of metal at the bottom to form a word line.
申请公布号 US8629483(B2) 申请公布日期 2014.01.14
申请号 US201113047774 申请日期 2011.03.14
申请人 JUENGLING WERNER;NANYA TECHNOLOGY CORP. 发明人 JUENGLING WERNER
分类号 H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L29/76
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